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Tech · AI

AI Chip Rivalry: Meta brings Google's TPU hardware into its production stack

A new open source bridge allows Meta to run its AI workloads on Google's specialized silicon, challenging Nvidia's software dominance.

By Leila Saeed ·

Illustration for: AI Chip Rivalry: Meta brings Google's TPU hardware into its production stack
Illustration generated for this article, not a news photograph.

The landscape of artificial intelligence infrastructure just shifted in a way that could reshape the industry for years to come.

Google has officially announced that its custom tensor processing units, known as TPUs, are now operating in production at Meta. This milestone was highlighted through the release of a PyTorch-native version of the SGLang inference engine. Alongside this, a corresponding open source version of vLLM, another popular inference tool, was also unveiled. Previously, these engines required Google's JAX framework to function on TPUs, but the new versions allow the hardware to serve as a native option for PyTorch users. This change means developers can largely avoid rewriting their existing codebases.

Zongwei Zhou, who leads Meta's PyTorch and TPU efforts, confirmed that the SGLang-TorchTPU setup is already live at Meta. He described the achievement as the result of a close three-way collaboration between Meta, Google, and the SGLang team. Zhou noted that the engine provides Meta with a remarkably mature, PyTorch-native serving stack. Jana van Greunen, a director of PyTorch engineering at Meta, emphasized that the company cannot be constrained by a single hardware architecture. She stated that TorchTPU enables Meta to deploy its PyTorch workloads directly to Google's TPUs. Google confirmed that it co-developed this technology with Meta's PyTorch team.

This is not the first time Meta has experimented with Google's hardware. Google identifies PyTorch/XLA, an older bridge connecting PyTorch to TPUs, as the predecessor to the new TorchTPU. Reports from SemiAnalysis last year indicated that Meta research teams used TPUs through this older bridge from 2020 to 2023. However, Meta canceled those contracts before the new initiative began. The recent push by Google to support PyTorch on TPUs was primarily aimed at Meta, a company that had previously resisted migrating to Google's JAX framework.

While the exact physical location of Meta's production TPUs remains unclear, industry talks last year reportedly involved Google Cloud TPU rentals starting in 2026 and purchases in 2027. Meta is also reported to have signed a multi-year rental agreement. This announcement landed just one day after Amazon revealed it would open source TorchNeuron, its own native PyTorch backend for Trainium2 and Trainium3 chips. Both moves appear designed to loosen Nvidia's strong hold on the AI software ecosystem.

In terms of raw performance, a tuned vLLM setup serving Moonshot AI's open-weight, 2.8-trillion-parameter Kimi K3 model reportedly exceeds 700 tokens per second for a single user on the seventh-generation Ironwood TPU. This speed figure comes from Inferact, the startup founded by vLLM's creators that helped Google build the new integration. Their test used 16 Ironwood chips with speculative decoding, a method that speeds up large language model inference using a small draft model. In comparison, vLLM's published setup on 16 Nvidia GB200s reached 452 tokens per second. The new kernels for Kimi K3 and Qwen 3.8 27B deliver roughly 1.4 to 2 times the throughput of the GB200 baseline at small batch sizes without speculative decoding.

The SGLang-TorchTPU project will continue to expand its model support, starting with DeepSeek V4.1 Flash and Reflection Beam. The team is also working toward Day 0 TPU support for new open models, meaning support will be available on release day. This goal is targeted for the first quarter of 2027, according to RadixArk. Google, Meta, and RadixArk plan to share further details at the SGLang Summit 2026, scheduled for November 12 and 13 in San Francisco.

Source: Tom's Hardware · original report published

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